1. Field of the Invention
This invention relates to an evaluation method of and measuring apparatus for the lifetime of a semiconductor material which, in the process of fabricating a semiconductor device, measures the lifetime of carriers generated by injecting energy into the semiconductor material to be measured, so that quality is evaluated in a non-contact and non-destructive manner.
2. Description of the Prior Art
In the process of fabricating semiconductor devices, high-density ICs, LSIs, etc. are fabricated by using silicon materials or the like. Generally, such a silicon material is in the form of a thin disk (of a thickness of below 900 .mu.m) known as a silicon wafer, and has a cross-sectional structure in which defects are distributed, as shown in FIG. 6A (defects are represented by points). In the device fabricating process, a desired device is fabricated on the surface or in a layer close to the surface of such a wafer. Accordingly, the thickness of the wafer which is actually used lies within only several .mu.m from the surface, and the remaining thickness of the wafer, which amounts to several hundred .mu.m, is used to impart a mechanical strength to the device fabricated on the wafer, and to perform gettering for the purpose of making silicon crystal in the device-fabricated portion non-defective, as shown in FIG. 6B. In recent years, in view of the fact that the actually used thickness of a silicon material is thin and for the purpose of improving the degree by which the surface layer is made non-defective, wafers of epitaxial structures have been produced in large quantities. In addition, various epitaxial structures, such as those shown in FIG. 7A to 7E, have been developed and have come into practical use with a view to attaining thin layers of higher purity and higher quality. FIG. 7A A shows a structure of a wafer generally referred to as an epitaxial wafer. FIG. 7B shows a structure referred to as a SOS structure, FIG. 7C shows a structure referred to as a SOl structure, FIG. 7D shows a structure referred to as a bonded wafer, and FIG. 7E shows a structure referred to as a SIMOX structure. These structures are generically referred to as epitaxial structures.
In recent years, as the density of memory devices has become increasingly high, the thickness of the actual device-forming material has been increasingly reduced. In this tendency of layer-thickness reduction, it has become necessary to enable evaluation of surface thin-layer portions of semiconductor materials having increasingly higher quality.
In order to enable the evaluation of crystal on the surface of such a semiconductor material and crystal in the silicon wafer bulk (the layer located sufficiently deeper than the surface layer) which forms a base for the surface, and to enable non-destructive evaluation in the fabrication process, the Applicants have previously developed non-contact and non-destructive lifetime measuring apparatuses employing laser and microwave (for example, Japanese Patent Laid-Open Nos.248081-1990 and 248082-1980, and Japanese Patent Application No.211122-1890). In such systems, microwave (of 10 GHz or lower) is radiated onto a silicon wafer from the surface thereof, and the reflection of microwave by carriers generated by a laser beam is measured so as to measure a lifetime on the basis of a carrier decay curve. Further, the lifetime of the surface or a layer in the vicinity of the surface and the lifetime of a deeper portion (the bulk) are separated from each other so as to enable crystal evaluation with respect to the surface and the bulk in a non-contact and non-destructive manner.
However, with such systems, it has been impossible to evaluate a thin layer of an epitaxial structure, such as that described before, in other words, it has been impossible to measure the lifetime of a thin layer. Lifetime measurement is impossible particularly in the case of an epitaxial wafer such as that shown in FIG. 7A. In this case, since a device is fabricated in a layer (referred to as an epitaxial layer) which is on the surface and which has a thickness t of several .mu.m and a resistivity .beta., of several .OMEGA.cm to several tens of .mu.m, it is necessary to evaluate the lifetime of the epitaxial layer. However, the base portion of the wafer (generally referred to as an epitaxial sub-layer) has a low resistivity .beta..sub.2 of 0.1 to 0.001 .OMEGA.cm, which results in 100% of the microwave being reflected, thereby extremely lowering the S/N ratio of a lifetime signal obtained from the epitaxial layer. In the case of a SOS structure, (sapphire substrate of Al.sub.2 O.sub.3) having an epitaxial layer thickness t of several such as that shown in FIG. 7B, the S/N ratio is extremely low due to a small amount of reflection of the microwave and the influence of surface recombination in the thin layer portion (which can also occur in the case of an epitaxial wafer), thereby making lifetime measurement impossible as in the case of an epitaxial wafer. In the case of a SOI structure, a SIMOX structure, and a bonded wafer each having an epitaxial layer thickness t of several to several tens of .mu.m, an epitaxial layer resistivity .beta..sub.1 of several to several tens of .OMEGA. cm and an epitaxial sub-layer resistivity .beta..sub.2 of several to several tens of .OMEGA. cm, such as those shown in FIGS. 7C, 7E and 7D, respectively, although these structures do not hinder a lifetime signal from being obtained by a conventional system employing laser and microwave, it is impossible to accurately separate the lifetime signal concerning the surface thin-layer portion whose evaluation is particularly required. Thus, with the above systems, it has been impossible to measure the lifetime of, in particular, a surface thin layer in the case of wafers having the structures shown in FIGS. 7A to 7E.